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(R)
CT RODU NT LETE P EPLACEME OBSO DED R MEN Data RECOM October 2002 NO Sheet
CA3089
FN0561.4
FM IF System
Description
Intersil CA3089 is a monolithic integrated circuit that provides all the functions of a comprehensive FM-IF system. The block diagram shows the CA3089 features, which include a three-stage FM-IF amplifier/limiter configuration with level detectors for each stage, a doubly-balanced quadrature FM detector and an audio amplifier that features the optional use of a muting (squelch) circuit. The advanced circuit design of the IF system includes desirable deluxe features such as delayed AGC for the RF tuner, and AFC drive circuit, and an output signal to drive a tuning meter and/or provide stereo switching logic. In addition, internal power supply regulators maintain a nearly constant current drain over the voltage supply range of +8.5V to +16V. The CA3089 is ideal for high-fidelity operation. Distortion in a CA3089 FM-IF System is primarily a function of the phase linearity characteristic of the outboard detector coil.
Features
* For FM IF Amplifier Applications in High-Fidelity, Automotive, and Communications Receivers
.
* Includes: IF Amplifier, Quadrature Detector, AF Preamplifier, and Specific Circuits for AGC, AFC, Muting (Squelch), and Tuning Meter * Exceptional Limiting Sensitivity at -3dB Point. . . . . . . . . . . . . . . . . . . . . . . . . . . 12V (Typ) * Low Distortion: (with Double-Tuned Coil) . . . . . . . . . . . . . . . . . 0.1% (Typ) * Single-Coil Tuning Capability * High Recovered Audio . . . . . . . . . . . . . . . . . . 400mV (Typ) * Provides Specific Signal for Control of Interchannel Muting (Squelch) * Provides Specific Signal for Direct Drive of a Tuning Meter * Provides Delayed AGC Voltage for RF Amplifier
Part Number Information
PART NUMBER CA3089E CA3089M1 (3089M) TEMP. RANGE (oC) -40 to 85 -40 to 85 PACKAGE 16 Ld PDIP 20 Ld SOIC PKG. NO. E16.3 M20.3
* Provides a Specific Circuit for Flexible AFC * Internal Supply-Voltage Regulators
Pinouts
CA3089 (PDIP) TOP VIEW
GND IF IN 1 INPUT BYPASS 2 DC FB BYPASS 3 FRAME GND 4 MUTE CONTROL 5 AUDIO OUT 6 AFC OUT 7 IF OUT 8 16 NC 15 DELAYED AGC 14 SUBSTRATE (GND) 13 TUNING METER OUT 12 MUTE LOGIC 11 V+ 10 REF BIAS 9 QUADRATURE INPUT IF IN INPUT BYPASS DC FB BYPASS FRAME GND MUTE CONTROL AUDIO OUT AFC OUT IF OUT 1 2 3 4 5 6 7 8 9
CA3089 (SOIC) TOP VIEW
20 GND 19 DELAYED AGC 18 GND 17 SUBSTRATE (GND) 16 TUNING METER OUT 15 MUTE LOGIC 14 V+ 13 REF BIAS 12 QUADRATURE INPUT 11 NC
GND 10
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright (c) Intersil Americas Inc. 2002. All Rights Reserved All other trademarks mentioned are the property of their respective owners.
CA3089
Absolute Maximum Ratings
Supply Voltage Between V+ and Frame GND. . . . . . . . . . . . . . . . . . . . . . . . . .16V Between V+ and Substrate GND . . . . . . . . . . . . . . . . . . . . . . .16V DC Current (Out of Delayed AGC). . . . . . . . . . . . . . . . . . . . . . . 2mA
Thermal Information
Thermal Resistance (Typical, Note 1)
JA (oC/W)
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95 Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC (SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE: 1. JA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
V+ = 12V (See Figures 3 and 4) TEMP. (oC) 25 25 25 25 25 25 VIN = 0.1V, AM Mod. = 30% VIN = 0.1V fO = 10.7MHz, fMOD = 400Hz, Deviation = 75kHz 25 25 25 25 25 25
(NOTE 3) PARAMETER DC CHARACTERISTICS Quiescent Circuit Current DC Voltages Terminal 1 (IF Input) Terminal 2 (AC Return to Input) Terminal 3 (DC Bias to Input) Terminal 6 (Audio Output) Terminal 10 (DC Reference) DYNAMIC CHARACTERISTICS Input Limiting Voltage (-3dB point), V1 (lim) AM Rejection (Terminal 6), AMR Recovered AF Voltage (Terminal 6) VO (AF) Total Harmonic Distortion, THD (Note 2) NOTES: Single Tuned (Terminal 6) Double Tuned (Terminal 6)
TEST CONDITIONS No signal input, Non muted
MIN 16 1.2 1.2 1.2 5.0 5.0 45 300 60
TYP 23 1.9 1.9 1.9 5.6 5.6 12 55 400 0.5 0.1 67
MAX 30 2.4 2.4 2.4 6.0 6.0 25 500 1.0 -
UNITS mA V V V V V V dB mV % % dB
Signal Plus Noise to Noise Ratio (Terminal 6)
2. THD characteristics are essentially a function of the phase characteristics of the network connected between Terminals 8, 9, and 10. 3. Terminal numbers refer to 16 Lead PDIP.
Application Information
V+ = 12V, TA 25oC 5k 125 CURRENT INTO TERMINAL 7 (A) 100 75 50 25 0 -25 -50 -75 -100 -125 -100 -50 0 50 100
10 7
RECOVERED AUDIO (dB) MUTING CONTROL AT MAXIMUM RESISTANCE
V+ = 12V, TA = 25oC 0 -10 -20 -30 -40 -50 -60 1 10 100 1K INPUT SIGNAL (V) 10K 100K 6 RECOVERED AUDIO FROM FULL OUTPUT (LEFT COORDINATE) 5 TUNER AGC DC VOLTAGE AT TERM. 15 (RIGHT COORDINATE) VOLTAGE AT TERMINAL 13 METER CIRCUIT (33k TO GND) (RIGHT COORDINATE) 4 3 2 1
A
CHANGE IN FREQUENCY (kHz)
FIGURE 1. AFC CHARACTERISTICS (CURRENT AT TERMINAL 7) vs CHANGE IN FREQUENCY. (SEE TEST CIRCUIT FIGURE 3)
FIGURE 2. MUTING ACTION, TUNER AGC, AND TUNING METER OUTPUT vs INPUT SIGNAL VOLTAGE. (SEE TEST CIRCUIT FIGURE 3)
2
DC (V)
CA3089 Test Circuits
3K
L (NOTE 5) V+ = 12V 22H C 100 pF 9 1 10 51 3 0.01 F 2 15 14 4 10 K 0.001 F 33K 0.5M 150A FULL SCALE
4
100 pF
5K
V+ = 12V 22H
C1 T (NOTE 8) C2 100 pF 9 1 10 51 3 0.01 F 2 15 14 10 K 0.001 F 33K 0.5M 150A FULL SCALE 13 0.001 F 120K 0.33F CA3089E 12 5 470 7 AFC OUTPUT 2.7K 6 AUDIO OUT 0.01 F 8.2K 5K
0.05F SIGNAL INPUT VOLTAGE 0.01F
11
8
3.9K 7 AFC OUTPUT 2.7K 6 12 5 13 470 0.001 F 120K 0.33F AUDIO OUT 0.01 F
SIGNAL INPUT VOLTAGE
0.05F 0.01F
11
8
CA3089E
0.02 F
0.02 F
TUNING METER
TUNING METER
NOTES: 4. All resistance values are in ohms. 5. L tunes with 100pF (C) at 10.7MHz. 6. Q0 (unloaded) 75 (G.I. Automatic Mfg. Div. EX22741 or equivalent)
NOTES: 7. All resistance values are in ohms. 8. T PRI. - Q0 (unloaded) 75 (tunes with 100pF (C1) 20 of 34e on 7/ " dia. form). 32 9. SEC. - Q0 (unloaded) 75 (tunes with 100pF (C2) 20 of 34e on 7/ " dia. form). 32 10. kQ (percent of critical coupling) 70%. (Adjusted for coil voltage VC) = 150mV. Above values permit proper operation of mute (squelch) circuit "E" type slugs, spacing 4mm. FIGURE 4. TEST CIRCUIT FOR CA3089E USING A DOUBLETUNED DETECTOR COIL
FIGURE 3. TEST CIRCUIT FOR CA3089E USING A SINGLETUNED DETECTOR COIL
Test Applications
L (NOTE 14)
100 0.01F 220pF 250pF 0.05F
V+ = 12V
100pF C 22 H 3.9K
11 8 1 300 INPUT FM TUNER (NOTE 12) IF OUT CERAMIC FILTER (NOTE 13) 330 3 2 9
10 CA3089E CA3089E 6
2.7K 0.01F
AUDIO OUT
NOTES: 11. All resistance values are in ohms. 12. Waller 4SN3FIC or equivalent. 13. Murata SFG 10.7mA or equivalent. 14. L tunes with 100pF (C) at 10.7MHz Q0 unloaded 75 (G.I. EX22741 or equivalent).
14 4
Performance Data at fO = 98MHz, fMOD = 400Hz, Deviation = 75kHz: -3dB Limiting Sensitivity . . . . . . . . . . . . . . . . . . 2V (Antenna Level) 20dB Quieting Sensitivity . . . . . . . . . . . . . . . . . 1V (Antenna Level) 30dB Quieting Sensitivity . . . . . . . . . . . . . . . .1.5V (Antenna Level)
FIGURE 5. TYPICAL FM TUNER USING THE CA3089E WITH A SINGLE TUNED DETECTOR COIL
3
CA3089 Test Applications (Continued)
FIGURE 6A. BOTTOM VIEW OF PRINTED CIRCUIT BOARD
FIGURE 6B. COMPONENT SIDE - TOP VIEW
FIGURE 6. ACTUAL SIZE PHOTOGRAPHS OF THE CA3089E AND OUTBOARD COMPONENTS MOUNTED ON A PRINTED-CIRCUIT BOARD
Block Diagram
L (NOTE 16) QUADRATURE INPUT V+ 22H C= 100pF 9 10 REFERENCE BIAS AFC AMPL. 2ND IF AMPL. 3RD IF AMPL. QUADRATURE DETECTOR AFC OUTPUT AUDIO OUTPUT MUTING SENSITIVITY
TO INTERNAL REGULATORS IF INPUT 1 IF AMPLIFIER 1ST IF AMPL.
11
IF OUT
8
7
AUDIO AMPL. AUDIO MUTE (SQUELCH) CONTROL AMPL.
6
3 0.02 F 0.02F 2 LEVEL DETECTOR LEVEL DETECTOR LEVEL DETECTOR LEVEL DETECTOR
5
DELAYED AGC FOR RF AMPL 15 10K FRAME SUBSTRATE 150A METER 33K TUNING METER CIRCUIT MUTE (SQUELCH) DRIVE CIRCUIT
470 12 0.33F TO STEREO THRESHOLD LOGIC CIRCUITS
120K 500K
4
14
13 TUNING METER OUTPUT
NOTES: 15. All resistance values are in ohms. 16. L Tunes with 100pF (C) at 10.7MHz. 17. QO @ 75 (G.I. EX22741 or equivalent). 18. Pin numbers refer to 16 lead DIP.
4
CA3089 Schematic Diagram
IF AMPLIFIER
Q9 A C R18 2K Q15 Q21 R19 2K R23 2K R24 480 R25 1.5K Q22 R27 750
R6 2K C11 1 B
R7 2K C12 1 C13 1
R10 2K
R11 2K C14 1
V+ Q3 V+ Q4 C1 1 Q8 Q8A Q10 R13A 2K Q12 Q6 INPUT BYPASSING R2 30K C4 0.2 R13 2.7K R3 360 R14 360 R12 2.7K Q11 R12A 2K Q7A R16A 2K Q7 Q14 Q14A Q13A Q16Q17 R15A 2K Q13 V+ Q19 Q20 R20 2K R21 480 R22 1.5K R15 2.7K SEE NEXT PAGE R28 750
C2 1 IF INPUT 1 Q1 Q2
2
C3 0.2
Q18 R16 2.7K R17 360
3 R1 30K V+ V+ R50 500 Q58 Q74 R51 5K C5 2 Q60 Q59 R52 400 Q62 R53 600 C6 3 Q61 Q63 Q70 R56 600 C7 3 C8 3 Q64 Q69 Q76 R61 4K Q68 Q75 R59 150 R60 300 Q77 Q84
15
AGC FOR RF AMPL.
TUNING 13 METER
NOTE: Pin numbers refer to 16 lead PDIP. LEVEL DETECTOR AND METER CIRCUIT
5
CA3089 Schematic Diagram
(Continued)
9 QUADRATURE INPUT
REF 10 BIAS
8 IF OUT
11 V+
DETECTOR
R33 500 R32 500 Q35 Q24 Q25 Q32 Q33 R31 390 Q44 Q46 Q45 R37 166 R38 500
AUDIO AMPLIFIER
R44 500 Q53 Q54 R42 166 Q51
Q23
A
R26 10K Q26 Q34
R34 10K
R63 300 Q38 Q39 R35 2.2K Q40 Q27 R29 200 R36 200 Q41 Q79 Q80
R64 300 Q81
R40 500 Q48 Q50
R41 500 Q49
D2
D3
Q82
AUDIO OUT 6 R49 5K Q83
V+ R65 5
R9 10K Q5 Z1 C B A R8 2K R5 4K D1 R4 480 R30 480
Q28 Q30 Q29 D4
V+ Q31
R45 500
R39 500 Q47 Q52
R43 500
50K
MUTE CONTROL
Q43 Q42
D5 Z2
R54 5K R55 13K Q65 Q66 Q67
AFC OUTPUT Q56 7
R46 4.2K
Q55
Q57 R47 500 R48 500
BIAS SUPPLY
AFC AMPLIFIER
Q71
C9 10 Q72
R57 10K
R62 V+ 500 Q78 4 FRAME 14 SUBSTRATE
Q73 C10 10 R58 50 12 MUTE LOGIC
NOTES: 19. All resistance values are in ohms. 20. All capacitance values are in pF. 21. Pin numbers refer to 16 lead PDIP.
MUTE DRIVE
6
CA3089 Dual-In-Line Plastic Packages (PDIP)
N E1 INDEX AREA 12 3 N/2
E16.3 (JEDEC MS-001-BB ISSUE D)
16 LEAD DUAL-IN-LINE PLASTIC PACKAGE INCHES SYMBOL
-B-
MILLIMETERS MIN 0.39 2.93 0.356 1.15 0.204 18.66 0.13 7.62 6.10 MAX 5.33 4.95 0.558 1.77 0.355 19.68 8.25 7.11 NOTES 4 4 8, 10 5 5 6 5 6 7 4 9 Rev. 0 12/93
MIN 0.015 0.115 0.014 0.045 0.008 0.735 0.005 0.300 0.240
MAX 0.210 0.195 0.022 0.070 0.014 0.775 0.325 0.280
A
E A2 L A C L
-AD BASE PLANE SEATING PLANE D1 B1 B 0.010 (0.25) M D1 A1
A1 A2
-C-
B B1 C D D1 E
eA eC
C
e
C A BS
eB
NOTES: 1. Controlling Dimensions: INCH. In case of conflict between English and Metric dimensions, the inch dimensions control. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Symbols are defined in the "MO Series Symbol List" in Section 2.2 of Publication No. 95. 4. Dimensions A, A1 and L are measured with the package seated in JEDEC seating plane gauge GS-3. 5. D, D1, and E1 dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010 inch (0.25mm). 6. E and eA are measured with the leads constrained to be perpendicular to datum -C- . 7. eB and eC are measured at the lead tips with the leads unconstrained. eC must be zero or greater. 8. B1 maximum dimensions do not include dambar protrusions. Dambar protrusions shall not exceed 0.010 inch (0.25mm). 9. N is the maximum number of terminal positions. 10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm).
E1 e eA eB L N
0.100 BSC 0.300 BSC 0.115 16 0.430 0.150
2.54 BSC 7.62 BSC 2.93 16 10.92 3.81
7
CA3089 Small Outline Plastic Packages (SOIC)
N INDEX AREA E -B1 2 3 SEATING PLANE -AD -CA h x 45o H 0.25(0.010) M BM
M20.3 (JEDEC MS-013-AC ISSUE C)
20 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL A
L
MILLIMETERS MIN 2.35 0.10 0.33 0.23 12.60 7.40 MAX 2.65 0.30 0.51 0.32 13.00 7.60 NOTES 9 3 4 5 6 7 8o Rev. 0 12/93
MIN 0.0926 0.0040 0.013 0.0091 0.4961 0.2914
MAX 0.1043 0.0118 0.0200 0.0125 0.5118 0.2992
A1 B C D E

A1 0.10(0.004) C
e H h L N
0.050 BSC 0.394 0.010 0.016 20 0o 8o 0.419 0.029 0.050
1.27 BSC 10.00 0.25 0.40 20 0o 10.65 0.75 1.27
e
B 0.25(0.010) M C AM BS
NOTES: 1. Symbols are defined in the "MO Series Symbol List" in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension "E" does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. "L" is the length of terminal for soldering to a substrate. 7. "N" is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width "B", as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch) 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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